74HC4017 2V~6V 1 35MHz SOIC-16 Counters, Divider IC

High-speed 74HC4017 decade (Johnson) counter/divider with 10 decoded outputs, TC carry, CE and MR, 2–6V operation, SOIC-16 package.

18.00 EGP

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SKU:3496300104055
74HC4017 2V~6V 1 35MHz SOIC-16 Counters, Divider IC

The 74HC4017 (74HC4017) is a high-speed CMOS decade counter/divider that provides ten decoded outputs driven in sequence by a single clock input. It implements a 5-stage Johnson counter so that one decoded output goes high for each clock cycle in a repeating 0–9 pattern, and the terminal-count (TC/CARRY) output indicates completion of the ten-step cycle. The device is available in SOIC-16 and other packages and is intended for reliable, low-power counting and sequencing tasks in digital systems.

On each active clock edge the internal stages advance and the corresponding decoded output is asserted while the others remain low; an active RESET forces the outputs to the initial state. A CLOCK ENABLE input allows counting to be gated, and the TC output can be used to cascade multiple chips for multi-digit sequencing. The HC family’s wide supply range (2 V to 6 V) and CMOS inputs give good noise immunity and low static power consumption, making the part suitable for battery-powered and general logic applications.

Mechanically the SOIC-16 package eases PCB layout for surface-mount designs and the device’s balanced propagation delays and transition times support stable timing and display driving. Typical maximum clock capability is high (tens of MHz under light load and proper VCC/CL conditions), so the 4017 is commonly chosen where decoded output sequencing, LED chases, frequency division, or simple state stepping is required in compact digital designs.

Features:
  • Ten decoded outputs with single-pulse sequencing.
  • Johnson (5-stage) counter architecture for sequential decoded outputs.
  • Terminal-count (TC) carry output for cascading devices.
  • Clock enable input to gate counting.
  • Asynchronous reset to force initial state.
  • Wide VCC operation from 2 V to 6 V.
  • Low static power consumption typical of HC CMOS devices.
  • Buffered inputs and balanced propagation delays for stable timing.
  • Available in SOIC-16 and multiple package options.
Specifications:
Parameter: Value:
Function: Decade (Johnson) counter with 10 decoded outputs.
Package: SOIC-16 (also PDIP, SOP, TSSOP variants).
Supply Voltage Range: 2 V to 6 V.
Typical fMAX (VCC = 5 V, CL = 15 pF): Up to ~50–60 MHz (device/load dependent).
Inputs: CMOS/TTL compatible, buffered inputs.
Outputs: 10 decoded outputs + Terminal Count (TC).
Clocking: Positive-edge counting with Clock Enable (CE).
Reset: Asynchronous Master Reset (MR).
Operating Temperature: −55 °C to +125 °C (depending on qualified version).
Propagation Delays: CP to decoded outputs: tens of ns (VCC and CL dependent).
Pinout Diagram:

Footprint:

Applications:
  • LED chasers and sequencers.
  • Frequency division and clock distribution.
  • Decoded step sequencing for control logic.
  • Multiplexed display timing and driver schemes.
  • Cascaded multi-digit sequencing or counting.
  • Timing and event counting in instrumentation.
Package Contents:
  • 1x 74HC4017 2V~6V 1 35MHz SOIC-16 Counters, Divider IC
Datasheet
Weight 10 g
Dimensions 10 × 20 mm

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