74679 12-Bit Address Comparator PDIP-20

74679 12-Bit Address Comparator PDIP-20

The SN74ALS679N is a high-speed 12-bit address comparator designed for digital systems requiring fast and reliable address matching. It compares two 12-bit binary words and provides an output indicating whether the inputs are equal, making it ideal for memory decoding, address recognition, and bus monitoring applications. Built using Advanced Low-Power Schottky (ALS) TTL technology, it offers low power consumption with improved switching speed compared to standard TTL devices. The device features cascaded comparison capability, allowing expansion to wider bit comparisons in complex systems. Packaged in a PDIP-20, it is well suited for through-hole designs, prototyping, and legacy system integration.

Features

• 12-bit parallel comparison for address/data matching.
• ALS TTL technology for low power and high speed.
• Output indicates equality condition between inputs.
• Cascadable for higher bit-width comparison.
• Compatible with standard TTL logic levels.
• Suitable for memory and bus control systems.
• PDIP-20 package for easy PCB mounting.

PINOUT

† The three shaded rows of the function table show combinations that would normally not be used in address comparator applications. The logic symbols above are not valid for these combinations in which P = 12, 13, and 14.
If symbols valid for all combinations are required, starting with the fourth exclusive-OR from the bottom, change P ≥ 9 to P = 9 . . . 11/13 . . . 15, P ≥ 10 to P = 10/11/14/15, and P ≥ 11 to P = 11/15.

Specifications

Applications

• Memory address decoding and chip select logic.
• Bus comparison and address matching systems.
• Microprocessor and microcontroller-based designs.
• Digital control and embedded systems.
• Legacy computing and retro hardware projects.

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