Description:
The SNx4HC165 devices are 8-bit parallel-load shift registers that, when clocked, shift the data toward a serial (QH) output. Parallel-in access to each stage is provided by eight individual direct data (A–H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SNx4HC165 devices also feature a clock-inhibit (CLK INH) function and a complementary serial (QH) output.
Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Because a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH must be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs.
Features:
- Wide Operating Voltage Range of 2 V to 6 V
- Outputs Can Drive Up to 10 LSTTL Loads
- Low Power Consumption, 80-µA Maximum ICC
- Typical tpd = 13 ns
- ±4-mA Output Drive at 5 V
- Low Input Current of 1 µA Maximum
- Complementary Outputs
- Direct Overriding Load (Data) Inputs
- Gated Clock Inputs
- Parallel-to-Serial Data Conversion
Technical Specifications
| Physical | |
| Case/Package | PDIP |
| Contact Plating | Gold |
| Mount | Through Hole |
| Number of Pins | 16 |
| Technical | |
| Direction | Unidirectional |
| Logic Function | Shift Register |
| Max Operating Temperature | 125 °C |
| Max Supply Voltage | 6 V |
| Min Operating Temperature | -40 °C |
| Min Supply Voltage | 2 V |
| Number of Bits | 8 |
| Number of Bits per Element | 8 |
| Number of Circuits | 1 |
| Number of Elements | 1 |
| Number of Input Lines | 9 |
| Number of Output Lines | 1 |
| Operating Supply Voltage | 5 V |
| Output Current | 10 mA |
| Propagation Delay | 190 ns |
| Quiescent Current | 8 µA |
| Turn-On Delay Time | 190 ns |
