7473 Dual Master-Slave J-K Flip-Flops 5V 10mA IC DIP-14
The 7473 is a dual in-line JK flip-flop IC. It contains two independent J-K flip-flops with individual J-K, clock, and direct clear inputs. The 74LS73 is a positive pulse-triggered flip-flop.
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متوفرالكود 7058296795608
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7473 Dual Master-Slave J-K Flip-Flops 5V 10mA IC DIP-14
The 7473 is a 74-series digital logic integrated circuit containing two independent master-slave J-K flip-flops. Each flip-flop has J and K data inputs, a clock input, and complementary outputs that allow it to store and change binary states according to the input conditions and clock signal.
The IC includes asynchronous active-low clear inputs for resetting the flip-flops. Its master-slave operation makes it suitable for sequential logic applications, including binary counters, frequency dividers, toggle circuits, and digital control systems. The DIP-14 through-hole package is convenient for breadboard prototyping, educational projects, and PCB assembly.
Features:
- Dual JK Flip Flop Package IC.
- Operating Voltage: 5V.
- High-Level Input Voltage: 2 V.
- Low-Level Input Voltage: 0.8 V.
- Operating temperature range = -55 to 125°C.
- Available in a 14-pin PDIP package.
Specifications:
| Parameter | Description |
|---|---|
| IC Number | 7473 |
| IC Type | Dual J-K Flip-Flop |
| Flip-Flop Type | Master-Slave J-K |
| Number of Flip-Flops | 2 |
| Inputs per Flip-Flop | J, K, Clock, Clear |
| Outputs | Q and complementary output, depending on variant |
| Clear Function | Asynchronous, active-low |
| Clock Operation | Clock-controlled; verify triggering details for the exact variant |
| Logic Family | 74-series TTL |
| Nominal Supply Voltage | 5V |
| Operating Supply Range | Typically 4.75–5.25V for standard 74-series TTL |
| Package Type | DIP-14 |
| Mounting Type | Through-hole |
| Supply Current | Depends on manufacturer and operating conditions |
Pinout:
| Pin Number | Pin Name | Description |
| 4 | Vcc | Powers the IC typically with 5V |
| 13 | Ground | Connected to the ground of the system |
| JK Flip Flop – 1 / JK Flip Flop – 2 | ||
| 1,5 | Clock-1/ Clock-2 | These pins must be provided with a clock pulse for the flip-flop |
| 2,6 | Clear-1 / Clear-2 | Resets the flip-flop by clearing its memory |
| 3, 12 | K-1/ K-2 | Input pin of the Flip Flop |
| 16,7 | J-1 / J-2 | Another Input pin of the Flip Flop |
| 15, 10 | Q-1(bar) / Q-2 (bar) | The inverted output pin of Flip Flop |
| 14,11 | Q-1 / Q-2 | Output Pin of the Flip Flop |
Applications:
- Shift Registers.
- Memory/Control Registers.
- EEPROM circuits.
- Latching devices.
Packages Included:
- 1 × 7473 Dual Master-Slave J-K Flip-Flops 5V 10mA IC DIP-14.
Datasheet:
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