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7473 IC Dual Master-Slave J-K Flip-Flops – Orignal

24.00 EGP

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Availability: In Stock
SKU:9569049756107

Features

arrowTwo J-K Master/Slave Flip Flops in a 14-Pin DIP Package

arrowOutputs Directly Interface to CMOS, NMOS and TTL

arrowLarge Operating Voltage Range

arrowWide Operating Conditions

Technical Specifications

Physical
Case/Package PDIP
Contact Plating Gold
Mount Through Hole
Number of Pins 14
Technical
Clock Edge Trigger Type Negative Edge
Frequency 60 MHz
High Level Output Current -4 mA
Logic Function Flip-Flop, JK-Type
Low Level Output Current 4 mA
Max Frequency 20 MHz
Max Operating Temperature 125 °C
Max Supply Voltage 5.5 V
Min Operating Temperature -55 °C
Min Supply Voltage 4.5 V
Number of Bits 2
Number of Bits per Element 1
Number of Channels 2
Number of Circuits 2
Number of Elements 2
Number of Input Lines 2
Number of Output Lines 1
Operating Supply Voltage 5 V
Output Current 4 mA
Polarity Non-Inverting
Propagation Delay 38 ns
Quiescent Current 4 µA
Turn-On Delay Time 38 ns

Datasheet

 

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