74HC107 Dual JK Flip-Flop IC with Reset 2V-6V 25mA DIP-14
The 74HC107 is a high-speed, low-power Dual J-K Flip-Flop with independent asynchronous reset. Operates at 2V-6V on negative-edge clock triggers.
22.00 EGP
In stockSKU 7287249882557
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74HC107 Dual JK Flip-Flop IC with Reset 2V-6V 25mA DIP-14
The 74HC107 is a high-speed Dual J-K Flip-Flop utilizing advanced silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL components while maintaining the ultra-low power consumption of standard CMOS integrated circuits.
Features
- Hysteresis on Clock Inputs
- Asynchronous Reset
- Complementary Outputs
- High Drive Capability (Fanout)
- Low Power Logic Replacement
- Balanced Delays
Specifications
| Parameter | Symbol | Test Conditions / VCC | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Recommended Operating Conditions | ||||||
| Supply Voltage Range | VCC | HC Types | 2.0 | — | 6.0 | V |
| DC Input or Output Voltage | VI, VO | — | 0 | — | VCC | V |
| Operating Temperature Range | TA | — | -55 | — | 125 | °C |
| DC Electrical Specifications (at TA = 25°C) | ||||||
| High-Level Input Voltage | VIH | VCC = 2.0V | 1.5 | — | — | V |
| VCC = 4.5V | 3.15 | — | — | V | ||
| VCC = 6.0V | 4.2 | — | — | V | ||
| Low-Level Input Voltage | VIL | VCC = 2.0V | — | — | 0.5 | V |
| VCC = 4.5V | — | — | 1.35 | V | ||
| VCC = 6.0V | — | — | 1.8 | V | ||
| High-Level Output Voltage (CMOS Loads) | VOH | VCC = 2.0V, IO = -0.02mA | 1.9 | — | — | V |
| VCC = 4.5V, IO = -0.02mA | 4.4 | — | — | V | ||
| VCC = 6.0V, IO = -0.02mA | 5.9 | — | — | V | ||
| High-Level Output Voltage (TTL Loads) | VOH | VCC = 4.5V, IO = -4mA | 3.98 | — | — | V |
| VCC = 6.0V, IO = -5.2mA | 5.48 | — | — | V | ||
| Low-Level Output Voltage (CMOS Loads) | VOL | VCC = 2.0V to 6.0V, IO = 0.02mA | — | — | 0.1 | V |
| Low-Level Output Voltage (TTL Loads) | VOL | VCC = 4.5V, IO = 4mA | — | — | 0.26 | V |
| VCC = 6.0V, IO = 5.2mA | — | — | 0.26 | V | ||
| Input Leakage Current | II | VCC = 6.0V, VI = VCC or GND | — | — | ±0.1 | μA |
| Quiescent Device Current | ICC | VCC = 6.0V, VI = VCC or GND | — | — | 4.0 | μA |
| Prerequisite & Switching Specifications (at TA = 25°C) | ||||||
| Maximum Clock Frequency | fMAX | VCC = 2.0V | 6 | — | — | MHz |
| VCC = 4.5V (CL = 50pF) | 30 | — | — | MHz | ||
| VCC = 5.0V (CL = 15pF) | — | 60 | — | MHz | ||
| Clock Pulse Width | tw | VCC = 2.0V | 80 | — | — | ns |
| VCC = 4.5V | 16 | — | — | ns | ||
| Setup Time (J, K to CP) | tSU | VCC = 4.5V | 20 | — | — | ns |
| Hold Time (J, K to CP) | tH | VCC = 4.5V | 3 | — | — | ns |
| Input Capacitance | CI | — | — | 10 | 10 | pF |
Pinout:
Applications
- Edge-triggered sequential logic systems
- High-speed digital logic timing and clock state synchronization
- Digital counters, frequency dividers, and register control circuits
- Noise-prone environments requiring advanced clock input filtering
Package Content
- 1 x 74HC107 Dual JK Flip-Flop IC with Reset 2V-6V 25mA DIP-14.
DataSheet
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