74LS164 Serial to Parallel Counter Shift Register 8-Bit DIP-14

74LS164 Serial to Parallel Counter Shift Register 8-Bit DIP-14

The 74LS164 is an 8-bit serial-in, parallel-out shift register integrated circuit designed to receive data serially and make it available through eight parallel output pins. It shifts the stored data with each active clock transition, making it useful when a digital system needs to expand its output capability or process serial data using parallel logic.

The IC includes two serial data inputs, a clock input, and an asynchronous active-low clear input for resetting the register. Its compact DIP-14 through-hole package makes it suitable for prototyping, educational electronics, digital logic projects, and PCB assembly. Unlike the 74HC595, the standard 74LS164 does not include a separate output latch, so its parallel outputs change as data shifts through the register.

Features:

• These 8-bit shift registers feature gated serial inputs and an asynchronous clear.
• A low logic level at either input inhibits entry of the new data, and resets the first flip-flop to the low level at the next clock pulse, thus providing complete control over incoming data.
• A high logic level on either input enables the other input, which will then determine the state of the first flip-flop.
• Data at the serial inputs may be changed while the clock is HIGH or LOW, but only information meeting the setup and hold time requirements will be entered.
• Clocking occurs on the LOW-to-HIGH level transition of the clock input.
• All inputs are diode-clamped to minimize transmission-line effects.
• Gated (enable/disable) serial inputs.
• Fully buffered clock and serial inputs.
• Asynchronous clear.

Specifications:

Pin Assignments:

Applications:

Package Includes:

• 1 × 74LS164 Serial to Parallel Counter Shift Register 8-Bit DIP-14.

Datasheet:

• 74LS164N